Defense Date

2007

Document Type

Dissertation

Degree Name

Doctor of Philosophy

Department

Electrical Engineering

First Advisor

Dr. Hadis Morkoç

Abstract

The unique properties, such as large direct bandgap, excellent thermal stability, high μH × ns, of III-nitrides make them ideal candidates for both optoelectronic and high-speed electronic devices. In the past decades, great success has been achieved in commercialization of GaN based light emitting diodes (LEDs) and laser diodes (LDs). However, due to the lack of native substrates, thin films grown on sapphire or SiC substrates have high defect densities that degrade the device performance and reliability. Conventional epitaxy lateral overgrowth (ELO) can reduce dislocation densities down to ∼10-6 cm-2 in the lateral growth area, but requires ex situ photolithography steps. Hence, an in situ method using a SiNx interlayer (nano-scale ELOG) has emerged as a promising technique. The GaN templates prepared by this method exhibit a very low dislocation density (low-10-7 cm-2) and excellent optical and electrical properties. As a cost, such high quality GaN templates containing SiN, nanonetworks are not suitable for heterojunction field effect transistor (HFET) applications due to degenerate GaN:Si layer which serves as parallel conduction channel. This dissertation discusses the growth of low dislocation density GaN templates, by using the in situ SiNx nanonetwork for conductive templates, and the AIN buffer for semi-insulating templates. On SiN x nanonetwork templates, double-barrier RTD and superlattice (SL) exhibited negative differential resistances. Moreover, the injection current of Blue LEDs (450 nm) was improved ∼30%. On semi-insulating GaN templates, nearly lattice matched AlInN/AIN/GaN HFETs were successfully demonstrated and exhibited ∼ 1600 cm2/Vs and 17 600 cm2/Vs Hall mobilities at 300 K and 10 K, respectively. Those mobility values are much higher than literature reports and indicate that high quality HFETs can be realized in lattice matched AlInN/AIN/GaN, thereby solving the strain related issue. The attempt to use InGaN as the 2DEG channel has also been successfully implemented. A Hall mobility (1230 cm2/Vs) was achieved in a 12 nm InGaN channel HFET with AlInGaN barrier, which demonstrates the viability of InGaN channel HFETs.

Rights

© The Author

Is Part Of

VCU University Archives

Is Part Of

VCU Theses and Dissertations

Date of Submission

June 2008

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